Phil Zarrow, ITM Consulting With over 35 years experience in PCB assembly, Phil is one of the leading experts in SMT process failure analysis. He has vast experience in SMT equipment, materials and processes.
Jim Hall, ITM Consulting A Lean Six-Sigma Master Blackbelt, Jim has a wealth of knowledge in soldering, thermal technology, equipment and process basics. He is a pioneer in the science of reflow.
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As Jim and Phil describe, this topic has a lot of factors. Specification interpretation is mentioned as a challenging variable as all sources of data are not consistent. Materials involved, types and grade of components used, vendors and solder types to name a few are relevant to failure modes and acceptable factors of safety. If the component breaks before the solder joint, it seems this should be relevant.
One commenter mentioned views about 25% voiding - is this data supported by reliability testing? I have customers who allow up to 40% for such devices. We know a lot about BGA devices and related long term life testing. I have had limited success finding information on this topic for small body SMT devices that are supported by actual reliability data.
I would be interested if you or anyone knows of actual testing that helps confirm or support the limits described in IPC-610 section 8.2.2, registration and voids effects on small package SMT devices. End user industry feedback and reliability experts I have consulted describe larger body sizes as having more serious, adverse effects related to voids, cracking due to CTE mismatches and the related mechanical stresses.
My interest and information is specific to 0402 body size components. They have very low mass, small foot print area and appear to be very robust when scale is accounted for. We used type 2 acceptance criteria for solder spec definitions. In parallel, we did create, where possible beyond those limits as part of our boundary definitions testing.
As part of a product qualification plan, we limited ourselves to comparing 0402 100nF ceramic X7R capacitors from 2 different, high end capacitor manufactures. We tested devices on PCBs and simultaneously in our products. We studied some of the effects of solder voiding. We applied the same number of samples with 0402 Null ohm resistors in parallel testing platforms. This standard test could measure all joints for low level resistance changes in addition to the parameters we wished to cover ( LLCR = < 10 milliohm max delta. Solder joints usually start to show resistive changes above ~90--> 100 milliohms). We continuously monitored Capacitance and Resistance (LCR bridge meter - Cs and Rs component levels ) changes on the DUT that had the 0402 capacitors on board.
We compared effects of voiding, co planarity and pad registration effects. We mounted 0402 caps in our product and on to PCB surfaces using industry standard land definitions per customer directives. The board material was a standard FR4 material.
Solder attach was a lead free Bi/Sn/Ag, low temperature attach due to material high end temp limit constraints.
We used multiple accelerated testing effects in over 2,500 solder joints. Shock (>200 G drop tests), Accelerated Thermal Cycle( 0-100 Deg C 2 Deg / min ramp - 10 min dwells -> 1,500 cycles), Biased Humidity 85c/85% RH, bend testing related to our product, over mating, rework cycles and thermal age tests.
We set certain test boundaries beyond expected use to look for boundary conditions as voiding, registration, conformal coating effects, board bow, twist etc are all involved in long term reliability.
With regard to voiding, we built some test groups with 30, 40 and > 50% voiding. Component to pad Registration was all very good - both on the board and on our product - it was difficult to create registration defects when you seem to want to on the board or on our product.
X ray, PDA / cross section, LLCR, die and pry analysis all suggested that even at beyond 50 % voiding, 0402 product size component will survive environmental acceleration testing with no measurable adverse effects.
We did create failures when pushed components beyond rated capabilities of the components used or beyond our process control limits. We had multiple Board level failures, but zero at the solder joint level.
Handling damage of components onto the boards was the main culprit, although some small percentage of the Null Ohm resistors failed as we did significant testing beyond rated limits.
Our conclusion based upon our testing, voiding did not play a statistically relevant factor until we went beyond 50% volume defined by 2D X ray and die and pry results. Solder joints all survived - internal component damage was identified as root cause for cases not damaged due to handling.
If readers have test data that supports the IPC board level specification components for these types of devices I would be interested in hearing about the results.
Best Regards.
Don Girard, Amphenol-TCS
S.A. you are certainly on the right track.
The significance of a void is directly related to its location in the solder joint, vertical as well as horizontal.
You use a 5DX, so you can determine vertical position relatively
accurately and (hopefully) repeatably. If everyone had a 5DX or
comparable tool, we (IPC etc) could start to define a spec based on 3-D void locations co-related to solder joint reliability data. But most assembler's don't have access to this kind of inspection tool.
Enough of the industry utilizes top-down X-Ray such that most can measure horizontal area of voids within a joint. As we stated in Board Talk, we don't feel that it is a very useful spec, INemi has test data that refutes the 25% horizontal criteria.
The current reality is that individual users such as yourself, will have to struggle with the tools you have available and establish your own co-relations between measured void data and the reliability requirements of your products, leading to in-house acceptance criteria.
Thank you for your feedback and sharing your experience.
James Hall, ITM Consulting
This was very interesting to me due to the fact that some have been saying with Rev. D of the 610 that voiding is just a process indicator. I have never agreed with that because I knew that a void was missing solder and would weaken the solder joint.
I program an Agilent 5DX. My major concern are voids in the heels of FPGs. When I teach operators I say that I would personally fix any void larger that 25% in the heel, but they should follow the direction of their Quality Engineer.
I looked at a 610 version from Feb 2005 section 5.2.2 and it did mention voids being a defect if the joint would not meet the solder specs. I would not have found it except for your article. Our solder criteria references ANSI/J-STD-001D. Most voiding topics deal with BGAs.
I did some internet research before our adoption if the version D and the industry appeared to be divided down the middle as far as voiding goes.
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One commenter mentioned views about 25% voiding - is this data supported by reliability testing? I have customers who allow up to 40% for such devices. We know a lot about BGA devices and related long term life testing. I have had limited success finding information on this topic for small body SMT devices that are supported by actual reliability data.
I would be interested if you or anyone knows of actual testing that helps confirm or support the limits described in IPC-610 section 8.2.2, registration and voids effects on small package SMT devices. End user industry feedback and reliability experts I have consulted describe larger body sizes as having more serious, adverse effects related to voids, cracking due to CTE mismatches and the related mechanical stresses.
My interest and information is specific to 0402 body size components. They have very low mass, small foot print area and appear to be very robust when scale is accounted for. We used type 2 acceptance criteria for solder spec definitions. In parallel, we did create, where possible beyond those limits as part of our boundary definitions testing.
As part of a product qualification plan, we limited ourselves to comparing 0402 100nF ceramic X7R capacitors from 2 different, high end capacitor manufactures. We tested devices on PCBs and simultaneously in our products. We studied some of the effects of solder voiding. We applied the same number of samples with 0402 Null ohm resistors in parallel testing platforms. This standard test could measure all joints for low level resistance changes in addition to the parameters we wished to cover ( LLCR = < 10 milliohm max delta. Solder joints usually start to show resistive changes above ~90--> 100 milliohms). We continuously monitored Capacitance and Resistance (LCR bridge meter - Cs and Rs component levels ) changes on the DUT that had the 0402 capacitors on board.
We compared effects of voiding, co planarity and pad registration effects. We mounted 0402 caps in our product and on to PCB surfaces using industry standard land definitions per customer directives. The board material was a standard FR4 material.
Solder attach was a lead free Bi/Sn/Ag, low temperature attach due to material high end temp limit constraints.
We used multiple accelerated testing effects in over 2,500 solder joints. Shock (>200 G drop tests), Accelerated Thermal Cycle( 0-100 Deg C 2 Deg / min ramp - 10 min dwells -> 1,500 cycles), Biased Humidity 85c/85% RH, bend testing related to our product, over mating, rework cycles and thermal age tests.
We set certain test boundaries beyond expected use to look for boundary conditions as voiding, registration, conformal coating effects, board bow, twist etc are all involved in long term reliability.
With regard to voiding, we built some test groups with 30, 40 and > 50% voiding. Component to pad Registration was all very good - both on the board and on our product - it was difficult to create registration defects when you seem to want to on the board or on our product.
X ray, PDA / cross section, LLCR, die and pry analysis all suggested that even at beyond 50 % voiding, 0402 product size component will survive environmental acceleration testing with no measurable adverse effects.
We did create failures when pushed components beyond rated capabilities of the components used or beyond our process control limits. We had multiple Board level failures, but zero at the solder joint level.
Handling damage of components onto the boards was the main culprit, although some small percentage of the Null Ohm resistors failed as we did significant testing beyond rated limits.
Our conclusion based upon our testing, voiding did not play a statistically relevant factor until we went beyond 50% volume defined by 2D X ray and die and pry results. Solder joints all survived - internal component damage was identified as root cause for cases not damaged due to handling.
If readers have test data that supports the IPC board level specification components for these types of devices I would be interested in hearing about the results.
Best Regards.
Don Girard, Amphenol-TCS
The significance of a void is directly related to its location in the solder joint, vertical as well as horizontal.
You use a 5DX, so you can determine vertical position relatively
accurately and (hopefully) repeatably. If everyone had a 5DX or
comparable tool, we (IPC etc) could start to define a spec based on 3-D void locations co-related to solder joint reliability data. But most assembler's don't have access to this kind of inspection tool.
Enough of the industry utilizes top-down X-Ray such that most can measure horizontal area of voids within a joint. As we stated in Board Talk, we don't feel that it is a very useful spec, INemi has test data that refutes the 25% horizontal criteria.
The current reality is that individual users such as yourself, will have to struggle with the tools you have available and establish your own co-relations between measured void data and the reliability requirements of your products, leading to in-house acceptance criteria.
Thank you for your feedback and sharing your experience.
James Hall, ITM Consulting
I program an Agilent 5DX. My major concern are voids in the heels of FPGs. When I teach operators I say that I would personally fix any void larger that 25% in the heel, but they should follow the direction of their Quality Engineer.
I looked at a 610 version from Feb 2005 section 5.2.2 and it did mention voids being a defect if the joint would not meet the solder specs. I would not have found it except for your article. Our solder criteria references ANSI/J-STD-001D. Most voiding topics deal with BGAs.
I did some internet research before our adoption if the version D and the industry appeared to be divided down the middle as far as voiding goes.
S.A.