The objective of this paper is to identify the various technological concepts and to give a focus on Chip in Wafer in Silicon technology. Program: Materials Tech
Paper outlines the process associated with soldering stacked packages using dip flux and dip solder paste designed to overcome the incidence of package warp. Program: Materials Tech
Flip chip bonding is a desirable attachment approach for minimizing size. This paper compares immersion and auto catalytic gold plating processes for flip chip bonding. Program: Materials Tech
Study evaluates one pass and two pass techniques for assembly of POP devices under torsion loading to compare impact on the fatigue durability. Program: Production Floor
Paper focuses on PoP standards, substrate design and assembly methodology for in-line processing of vertically stacked IC package elements. Program: Production Floor