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February 22, 2012
Channels  »
Failure Mechanism in Embedded Capacitors
Program: Analysis Lab
Reliability of Coated WLCSP Components
Program: Analysis Lab
Lifted Leads on QFP Components
Program: Ask the Experts
Max Interval Between Reflow for OSP Boards
Program: Board Talk
Printable Materials for Electronic Packaging
Program: Materials Tech
Nanotechnology for Lead-free Final Finishes
Program: Materials Tech
How To Determine Stencil Thickness
Program: Board Talk
Poor Metrology: The Hidden Cost
Program: Supply Chain
Advances in Monitoring of Stencil Printing
Program: Production Floor
What Causes Solder Fillet Peaks
Program: Ask the Experts
Private Space Flight Takes Off
Program: Technology Briefing
How Many Zones Needed for Lead-free Profile?
Program: Ask the Experts
Future of the Self-Driving Automobile
Program: Technology Briefing
Can We Skip Cleaning After Rework?
Program: Board Talk
Soldering to Thin Flexible Circuits
Program: Ask the Experts
Head-On-Pillow Defect - A Pain in the Neck
Program: Analysis Lab
Underfill Limitations for Future Packages
Program: Materials Tech
Reliability Assessment of Reballed BGAs
Program: Analysis Lab
Conformal Coating & Connector Holes
Program: Ask the Experts
Real or Fake? The Counterfeit Chip Conundrum
Program: Supply Chain
Problems With Starved "J" Lead Joints
Program: Board Talk
Limitations of DI-Water Cleaning Processes
Program: Production Floor
Assembly Options for Handheld Products
Program: Production Floor
Solder Bridging on BGAs
Program: Ask the Experts
Maximizing the Value of Automatic Inspection in PCB Assembly
Program: Production Floor
Channels  »
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We have hundreds of programs in the IPC Outlook database. Each program is categorized into a Channel based on the subject. Check back often, we add new programs every week.
Failure Mechanism in Embedded Capacitors
Paper covers high temperature life testing on embedded capacitors to precipitate failures as a result of defects in the composite dielectric.
Program: Analysis Lab
Reliability of Coated WLCSP Components
Paper evaluates coating adhesion and solder joint reliability for assemblies with different conformal coatings, solder masks and underfill.
Program: Analysis Lab
Lifted Leads on QFP Components
After placement and reflow, we are having a random lifted lead problem on some QFP's. Is a 1% fall out rate normal? What might be the cause?
Program: Ask the Experts
Max Interval Between Reflow for OSP Boards
With OSP coated circuit boards, what is the maximum allowable and recommend time interval between reflow of the first and second sides to insure proper wetting.
Program: Board Talk
Printable Materials for Electronic Packaging
This paper reports on novel printable materials that have the potential to surpass conventional materials.
Program: Materials Tech
Nanotechnology for Lead-free Final Finishes
Paper describes use of organic metal finish deposited onto copper pads to provide protection against oxidation and preserve solderability.
Program: Materials Tech
How To Determine Stencil Thickness
On what basis is stencil thickness decided in the case of BGA's or fine pitch components? The Assembly Brothers dive in.
Program: Board Talk
Poor Metrology: The Hidden Cost
Paper compares and contrasts acquiring a Cpk value from an external metrology system versus one from an internal system.
Program: Supply Chain
Advances in Monitoring of Stencil Printing
Paper presents a print verification technology that captures the full board image, analyzes the data and accepts or rejects the print.
Program: Production Floor
What Causes Solder Fillet Peaks
We are soldering a screw with a single point solder robot that leaves a peak in the solder joint. What is causing this defect?
Program: Ask the Experts
Channels  »
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